zhongziso种子搜
首页
功能
磁力转BT
BT转磁力
使用教程
免责声明
关于
zhongziso
搜索
[FreeTutorials.Us] Udemy - Learn VHDL and FPGA Development
magnet:?xt=urn:btih:de3d7c39abbbce16fea5e882b0152398cff8c485&dn=[FreeTutorials.Us] Udemy - Learn VHDL and FPGA Development
磁力链接详情
Hash值:
de3d7c39abbbce16fea5e882b0152398cff8c485
点击数:
207
文件大小:
1.93 GB
文件数量:
59
创建日期:
2021-4-28 19:21
最后访问:
2024-10-29 09:36
访问标签:
FreeTutorials
Us
Udemy
-
Learn
VHDL
and
FPGA
Development
文件列表详情
10. Xilinx Tools/1. Xilinx Tools Introduction.mp4 1.33 MB
10. Xilinx Tools/2. Download the Vivado Tool Suite for the BASYS 3.mp4 36.93 MB
10. Xilinx Tools/3. ISim VHDL Simulation Tool.mp4 4.68 MB
10. Xilinx Tools/4. Xilinx ISE FPGA Development Tool.mp4 9.23 MB
10. Xilinx Tools/5. Programming The BASYS 2 FPGA Development Board.mp4 1.79 MB
11. Lab 1 - Full Adder/1. Introduction.mp4 5.68 MB
11. Lab 1 - Full Adder/2. BASYS 3 Full Adder Demonstration.mp4 87.88 MB
11. Lab 1 - Full Adder/3. BASYS 2 Full Adder Demonstration.mp4 31.9 MB
11. Lab 1 - Full Adder/4. BASYS 2 Full Adder Solution.mp4 38.67 MB
12. Lab 2 - Shift Register/1. Introduction.mp4 5.67 MB
12. Lab 2 - Shift Register/2. BASYS 3 Shift Register Demonstration.mp4 46.87 MB
12. Lab 2 - Shift Register/3. BASYS 2 Shift Register Demonstration.mp4 37.7 MB
13. Lab 3 - Universal Shift Register/1. Introduction.mp4 5.07 MB
13. Lab 3 - Universal Shift Register/2. BASYS 3 Universal Shift Register Demonstration.mp4 70.63 MB
13. Lab 3 - Universal Shift Register/3. BASYS 2 Universal Shift Register Demonstration.mp4 62.3 MB
13. Lab 3 - Universal Shift Register/4. BASYS 2 Universal Shift Register Solution.mp4 69.65 MB
14. Lab 4 - 7 Segment Display/1. Introduction.mp4 6.09 MB
14. Lab 4 - 7 Segment Display/2. BASYS 3 - 7 Segment Display Demonstration.mp4 43.84 MB
14. Lab 4 - 7 Segment Display/3. BASYS 2 - 7 Segment Display Demonstration.mp4 45.39 MB
15. Lab 5 - Counter/1. Introduction.mp4 3.7 MB
15. Lab 5 - Counter/2. BASYS 3 Counter Demonstration.mp4 24.67 MB
15. Lab 5 - Counter/3. BASYS 2 Counter Demonstration.mp4 31.44 MB
16. Lab 6 - Multiplier/1. Introduction.mp4 7.57 MB
16. Lab 6 - Multiplier/2. BASYS 3 Multiplier Demonstration.mp4 102.35 MB
16. Lab 6 - Multiplier/3. BASYS 2 Multiplier Demonstration.mp4 61.87 MB
17. Lab 7 - RC Servo/1. Introduction.mp4 21.31 MB
17. Lab 7 - RC Servo/2. BASYS 3 RC Servo Demonstration.mp4 81.64 MB
17. Lab 7 - RC Servo/3. BASYS 2 RC Servo Demonstration.mp4 25.91 MB
2. Introduction/1. Introduction to the Course.mp4 35.18 MB
2. Introduction/2. Introduction to VHDL.mp4 55.31 MB
3. VHDL Data Types/1. Data Types Introduction.mp4 26.99 MB
3. VHDL Data Types/2. Signals Variables Constants.mp4 41.58 MB
3. VHDL Data Types/3. Unsigned Signed Data Types.mp4 47.51 MB
3. VHDL Data Types/4. Standard Logic Vector Standard Logic.mp4 41.26 MB
3. VHDL Data Types/5. Integer Boolean Data Types.mp4 34.61 MB
3. VHDL Data Types/6. Initializing Values in VHDL.mp4 21.3 MB
3. VHDL Data Types/7. Data Type Examples in VHDL Designs Part 1.mp4 14.9 MB
3. VHDL Data Types/8. Data Type Examples in VHDL Designs Part 2.mp4 7.86 MB
4. VHDL Syntax/2. If Statement Case Statement.mp4 76.21 MB
4. VHDL Syntax/3. For Loop While Loop.mp4 70.39 MB
4. VHDL Syntax/4. VHDL For Loop Example.mp4 8.07 MB
4. VHDL Syntax/5. When Else Statement With Select When Statement.mp4 39.84 MB
4. VHDL Syntax/6. VHDL Processes and Concurrent Statement.mp4 55.72 MB
4. VHDL Syntax/7. VHDL Syntax Design Example.mp4 9.58 MB
5. VHDL Coding Structure/1. Organizing Your VHDL Designs.mp4 11.4 MB
5. VHDL Coding Structure/2. VHDL Design Structure.mp4 60.82 MB
5. VHDL Coding Structure/3. VHDL Design Architecture Styles.mp4 97.46 MB
5. VHDL Coding Structure/4. Data Flow Architecture Example - Full Adder.mp4 9.71 MB
5. VHDL Coding Structure/5. Behavioral Architecture Example - Full Adder.mp4 7.19 MB
6. Test Bench/1. Test Benches Introduction.mp4 46.33 MB
6. Test Bench/2. Test Bench Structure Walkthrough.mp4 8.18 MB
6. Test Bench/3. Walkthrough of a Completed Test Bench.mp4 10.58 MB
7. Implementing State Machines in VHDL/1. State Machine Introduction.mp4 31.36 MB
8. FPGA Development Boards/2. BASYS 3 Board Overview.mp4 84.42 MB
8. FPGA Development Boards/5. BASYS 2 Board.mp4 3.91 MB
8. FPGA Development Boards/8. BASYS 2 Board Overview.mp4 37.81 MB
9. Altera Tools/1. Altera Tools Introduction.mp4 2.47 MB
9. Altera Tools/2. ModelSim VHDL Simulation Tool.mp4 6.24 MB
9. Altera Tools/3. Quartus II FPGA Development Tool.mp4 4.3 MB
其他位置